Design of a Frequency Doubler Circuit for Suppressing Odd Harmonics

Abstract

In this paper, a doubler circuit which can suppress odd harmonics is designed by using the non-linear characteristics of field effect transistor (FET) and bipolar junction transistor(BJT) devices. The frequency doubler consists of three parts: small signal full wave rectifier circuit, frequency doubler circuit and band-pass filter circuit. It realizes fundamental and third harmonics suppression by rectifying the input signal of single FET frequency doubler. Meanwhile, the output power is twice as high as that of single FET frequency doubler (3dB higher). Circuit simulation results indicate that when the input fundamental voltage amplitude is 0.5V, the output voltage amplitude of second harmonics is 0.342V, the fundamental suppression is greater than 48.85dBc, and the third harmonic suppression is greater than 34.39dBc. Compared with the traditional single FET frequency doubler, this design improves the frequency conversion efficiency.