Design and Optimization of High Performance K-band Voltage Controlled Oscillator

Zheng-chen WANG, Zhao-bo WU, Xing-hua WANG

Abstract


A high performance voltage-controlled oscillator (VCO) fabricated in TSMC 90nm CMOS process is designed. Design methods of VCO and its buffer are demonstrated. Furthermore, simulation results of VCO are presented. The VCO and its buffer proposed are integrated into a K-band phase-locked loop (PLL). The proposed VCO including buffer consumes only 27mW from a 1.2V power supply and occupies chip area of 540um×360um. The measurement results exhibit phase noise could achieve -93.5dBc/Hz at 1MHz frequency offset. The measured tuning range of VCO is 22.7GHz-28.6GHz.

Keywords


VCO, K-band PLL, Phase noise


DOI
10.12783/dtetr/ameme2017/16253

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